Microchip Technology /ATSAMD51P19A /RTC /MODE1 /CTRLB

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Interpret as CTRLB

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GP0EN)GP0EN 0 (GP2EN)GP2EN 0 (DEBMAJ)DEBMAJ 0 (DEBASYNC)DEBASYNC 0 (RTCOUT)RTCOUT 0 (DMAEN)DMAEN 0 (DIV2)DEBF0 (DIV2)ACTF

DEBF=DIV2, ACTF=DIV2

Description

MODE1 Control B

Fields

GP0EN

General Purpose 0 Enable

GP2EN

General Purpose 2 Enable

DEBMAJ

Debouncer Majority Enable

DEBASYNC

Debouncer Asynchronous Enable

RTCOUT

RTC Output Enable

DMAEN

DMA Enable

DEBF

Debounce Freqnuency

0 (DIV2): CLK_RTC_DEB = CLK_RTC/2

1 (DIV4): CLK_RTC_DEB = CLK_RTC/4

2 (DIV8): CLK_RTC_DEB = CLK_RTC/8

3 (DIV16): CLK_RTC_DEB = CLK_RTC/16

4 (DIV32): CLK_RTC_DEB = CLK_RTC/32

5 (DIV64): CLK_RTC_DEB = CLK_RTC/64

6 (DIV128): CLK_RTC_DEB = CLK_RTC/128

7 (DIV256): CLK_RTC_DEB = CLK_RTC/256

ACTF

Active Layer Freqnuency

0 (DIV2): CLK_RTC_OUT = CLK_RTC/2

1 (DIV4): CLK_RTC_OUT = CLK_RTC/4

2 (DIV8): CLK_RTC_OUT = CLK_RTC/8

3 (DIV16): CLK_RTC_OUT = CLK_RTC/16

4 (DIV32): CLK_RTC_OUT = CLK_RTC/32

5 (DIV64): CLK_RTC_OUT = CLK_RTC/64

6 (DIV128): CLK_RTC_OUT = CLK_RTC/128

7 (DIV256): CLK_RTC_OUT = CLK_RTC/256

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